1. Field of the Invention
The present invention relates generally to image scanning, printing and similar imaging systems in which image scaling operations can be performed and, more specifically, to minimizing memory usage for scaling without discarding original image data and to maximizing image quality over a substantial range of scaling percentages.
2. Description of the Related Art
Image scaling is an important operation in so-called “multifunction” or “all-in-one” machines that perform some combination of scanning, printing, copying, facsimile and other tasks. Scaling refers to the operation that a user can initiate to reduce or enlarge an image, typically by a percentage that the user inputs. For example, a user may place a document in the machine, enter the number “30” and press a “Reduce” button and a “Copy” button or some other combination of buttons. In response, the machine scans the document, stores the scanned image data digitally in a memory, applies an algorithm to the data to reduce the size of the image by 30 percent, and prints the reduced image represented by the data.
Scaling algorithms can be implemented in hardware or software, but when implemented in hardware, such as an application-specific integrated circuit (ASIC), one objective is to minimize the amount of memory and other hardware used. Therefore, scaling algorithms used in such devices are typically as straightforward as possible, and enhancements that may be useful to some users may be sacrificed for the sake of manufacturing economy or other reasons.
Scaling percentage range is one aspect in which features are often sacrificed in favor of more straightforward algorithms. For example, most commercially available all-in-one machines allow a user to input a scaling percentage between 25 and 400 percent because the algorithms to achieve this range can be implemented relatively economically, and this range is apparently believed sufficient to satisfy the majority of consumers in the relevant market. Nevertheless, some users may wish to have a wider range from which to choose a scaling percentage.
Another such aspect in which tradeoffs are often made is the choice of scaling algorithm itself. A number of image scaling algorithms are known: pixel deletion and insertion, linear and cubic interpolation, nearest-neighbor approximation, morphology, area-mapping, and even neural network-based techniques. Although it is known that some of these algorithms provide better results under certain circumstances than others, the choice of algorithm to provide in an all-in-one machine typically involves an engineering compromise that is intended to cover the most likely circumstances under which a user is to operate the machine. For example, it is known that although pixel insertion or deletion can be implemented very efficiently in hardware, it results in severe aliasing that users perceive as poor image quality. Similarly, it is known that although bicubic interpolation results in a high image quality, it typically requires a large amount of memory to implement, making it impractical for ASIC implementation. Bilinear interpolation affords a good compromise between image quality and hardware overhead, but image quality degrades as scaling percentage decreases, due to the discarding of data that is an inherent characteristic of this algorithm. Specifically, bilinear interpolation uses as its input only two lines of pixels at a time, but full image quality will not be preserved unless a scaling algorithm uses all lines of the image.
It would be desirable to provide an image scaling architecture and method that can be efficiently implemented in an ASIC, yet does not significantly sacrifice image quality or features that may be of interest to users. The present invention addresses these problems and others in the manner described below.